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JR0143985 - SOC Senior Logic Design Engineer DFX/DFD
Company: Intel
Location: Santa Clara, CA
Employment Type: Full Time
Date Posted: 12/14/2020
Expire Date: 02/12/2021
Job Categories: Architectural Services, Construction, Mining and Trades, Engineering, Healthcare, Practitioner and Technician, Law Enforcement, and Security, Military, Research & Development, Medical, Energy / Utilities
Job Description
JR0143985 - SOC Senior Logic Design Engineer DFX/DFD

The XSD (Xeon Server Development) Group is looking for a highly motivated Senior Logic Designer to join a seasoned team to design the compute die for the next generation of Xeon processor.

Your responsibilities will include but not be limited to:

  • Architect  DFD (Design for Debug) features of the next generation Xeon processor
  • Implement the design in RTL along with providing technical leadership to a small team of designers
  • Capable of independently driving technical taskforces when critical issues arise

The ideal candidate should exhibit the following behavioral traits:

  • Strong leadership and mentorship skills
  • Take initiative to tackle challenging problems
  • String problem-solving skills
  • Ability to multitask
  • Strong written and verbal communication skills
  • Ability to work in a dynamic and team-oriented environment


Qualifications

Minimum Qualifications

Bachelor's in Electrical/Computer Engineering, Computer Science or related field plus 10+ years of relevant experience or a Master's degree in Electrical/Computer Engineering, Computer Science or related field with 7+ years of relevant experience. 

Your experience will be in the following:

  • Experience doing customer triage and debug
  • Ability to work with Design for Test (DFT) team to provide requirement for DFT logic used in Debug and verify the logic
  • Understanding of Design Debug using Scan Dump, Array Freeze and clock stop
  • Thorough understanding of IEEE 1149.1

Preferred Qualifications

  • Familiarity with Intel Debug IP’s such ADL, Sierra Peak, VISA, RTB Controller, Trigger Fabric, Probe Mode or similar concepts used external to Intel.
  • Experience with Security aspect of design and relationship to Design Debug
  • Experience with CrashDump & CrashLog

Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Other Locations

US, California, Folsom;US, Oregon, Hillsboro



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0143985Santa Clara
Contact Information
Company Name: Intel
Website: http://www.applytracking.com/x.aspx...
Company Description:

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